DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 500

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 13 Serial Communication Interface
Rev. 3.00 Mar 21, 2006 page 470 of 814
REJ09B0302-0300
Receiving Serial Data (Asynchronous Mode)
Figure 13.7 shows a sample flowchart for receiving serial data and indicates the procedure to
follow.
No
No
Clear RE bit to 0 in SCR
Read RDRF flag in SSR
RDRF flag to 0 in SSR
and FER flags in SSR
from RDR, and clear
Read ORER, PER,
Read receive data
Start receiving
PER
RDRF = 1?
ORER = 1?
receiving?
Finished
Initialize
Figure 13.7 Sample Flowchart for Receiving Serial Data (1)
End
FER
No
Yes
Yes
(continued on next page)
Yes
Error handling
5
1
2
4
3
1. SCI initialization: the receive data function of
2, 3. Receive error handling and break
4. SCI status check and receive data read: read
5. To continue receiving serial data: check the
the RxD pin is selected automatically.
detection: if a receive error occurs, read the
ORER, PER, and FER flags in SSR to identify
the error. After executing the necessary error
handling, clear the ORER, PER, and FER
flags all to 0. Receiving cannot resume if any
of the ORER, PER, and FER flags remains
set to 1. When a framing error occurs, the
RxD pin can be read to detect the break state.
SSR, check that RDRF is set to 1, then read
receive data from RDR and clear the RDRF
flag to 0. Notification that the RDRF flag has
changed from 0 to 1 can also be given by the
RXI interrupt.
RDRF flag, read RDR, and clear the RDRF
flag to 0 before the stop bit of the current
frame is received. If the DMAC is activated by
an RXI interrupt to read the RDR value, the
RDRF flag is cleared automatically.