DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 547

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

14.4
When using the SCI as a smart card interface, note the following points.
Receive Data Sampling Timing in Smart Card Mode and Receive Margin: In smart card mode
the SCI operates on a base clock with 372 times the bit rate frequency. In receiving, the SCI
synchronizes internally with the fall of the start bit, which it samples on the base clock. Receive
data is latched at the rising edge of the 186th base clock pulse. See figure 14.10.
The receive margin can therefore be expressed as follows.
Receive margin in smart card mode:
Internal
base clock
Receive data
(RxD)
Synchronization
sampling timing
Data sampling
timing
M =
M: Receive margin (%)
N: Ratio of clock frequency to bit rate (N = 372)
D: Clock duty cycle (D = 0 to 1.0)
L: Frame length (L = 10)
F: Absolute deviation of clock frequency
Usage Notes
Figure 14.10 Receive Data Sampling Timing in Smart Card Mode
0.5 –
2N
0
1
186 clocks
– (L – 0.5) F –
185
372 clocks
Start
bit
371
D – 0.5
N
0
D0
(1 + F)
Rev. 3.00 Mar 21, 2006 page 517 of 814
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Section 14 Smart Card Interface
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REJ09B0302-0300
371
0
D1