DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 510

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 13 Serial Communication Interface
13.3.4
In synchronous mode, the SCI transmits and receives data in synchronization with clock pulses.
This mode is suitable for high-speed serial communication.
The SCI transmitter and receiver share the same clock but are otherwise independent, so full
duplex communication is possible. The transmitter and receiver are also double buffered, so
continuous transmitting or receiving is possible by reading or writing data while transmitting or
receiving is in progress.
Figure 13.14 shows the general format in synchronous serial communication.
In synchronous serial communication, each data bit is placed on the communication line from one
falling edge of the serial clock to the next. Data is guaranteed valid at the rise of the serial clock.
In each character, the serial data bits are transmitted in order from LSB (first) to MSB (last). After
output of the MSB, the communication line remains in the state of the MSB. In synchronous mode
the SCI receives data by synchronizing with the rise of the serial clock.
Communication Format: The data length is fixed at 8 bits. No parity bit or multiprocessor bit
can be added.
Clock: An internal clock generated by the on-chip baud rate generator or an external serial clock
input from the SCK pin can be selected by means of the C/A bit in SMR and bits CKE1 and CKE0
in SCR. See table 13.9 for details of SCI clock source selection.
When the SCI operates on an internal clock, the serial clock is output from the SCK pin.
Eight serial clock pulses are output per transmitted or received character. When the SCI is not
transmitting or receiving, the clock signal remains in the high state. However, in a receive-only
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Serial data
Serial clock
Note:
Synchronous Operation
*
High except in continuous transmitting or receiving
Don’t care
Figure 13.14 Data Format in Synchronous Communication
*
Bit 0
LSB
Bit 1
One unit (character or frame) of serial data
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
MSB
Bit 7
Don’t care
*