DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 620

MCU 5V 512K 100-TQFP

DF3052BX25V

Manufacturer Part Number
DF3052BX25V
Description
MCU 5V 512K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheets

Specifications of DF3052BX25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF3052BX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 18 ROM
If erasing multiple blocks, set a single bit in EBR1/EBR2 for the next block to be erased, and
repeat the erase/erase-verify sequence as before.
Rev. 3.00 Mar 21, 2006 page 590 of 814
REJ09B0302-0300
Notes: 1. Prewriting (setting erase block data to all 0s) is not necessary.
2. Verify data is read in 16-bit (W) units.
3. Make only a single-bit specification in the erase block registers (EBR1 and EBR2). Two or more bits must not be set simultaneously.
4. The wait times and the value of N are shown in section 21.2.5, Flash Memory Characteristics.
Figure 18.13 Erase/Erase-Verify Flowchart (Single-Block Erase)
Increment
address
No
Set block start address as verify address
H'FF dummy write to verify address
Clear ESU1 (2) bit in FLMCR1 (2)
Clear SWE1 (2) bit in FLMCR1 (2)
Set SWE1 (2) bit in FLMCR1 (2)
Set ESU1 (2) bit in FLMCR1 (2)
Clear EV1 (2) bit in FLMCR1 (2)
Clear E1 (2) bit in FLMCR1 (2)
Set EV1 (2) bit in FLMCR1 (2)
Set E1 (2) bit in FLMCR1 (2)
Last address of block?
Set EBR1 or EBR2
Verify data = all 1s?
Read verify data
End of erasing
Wait tsswe s
Wait tcswe s
Wait tsesu s
Wait tcesu s
Disable WDT
Wait tsevr s
Enable WDT
Wait tsev s
Wait tcev s
Wait tse ms
Wait tce s
n = 1
Start
Yes
Yes
*1
No
*4
*3
*4
Start of erase
*4
Erase halted
*4
*4
*4
*4
*2
*4
*4
Perform erasing in block units.
Clear SWE1 (2) bit in FLMCR1 (2)
Clear EV1 (2) bit in FLMCR1 (2)
Wait tcswe s
Wait tcev s
Erase failure
n
N?
Yes
*4
No
n
*4
*4
n + 1

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