DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 119

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 1—Priority Level B1 (IPRB1): Selects the priority level of A/D converter interrupt requests.
Bit 0—Reserved: This bit can be written and read, but it does not affect interrupt priority.
5.2.3
ISR is an 8-bit readable/writable register that indicates the status of IRQ
requests.
Bit
Initial value
Read/Write
Note:
ISR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 and 6—Reserved: Read-only bits, always read as 0.
Bits 5 to 0—IRQ
IRQ
Note: n = 5 to 0
Bit 1: IPRB1
0
1
Bits 5 to 0:
IRQ5F to IRQ0F
0
1
0
interrupt requests.
*
Only 0 can be written, to clear flags.
IRQ Status Register (ISR)
Reserved bits
5
—
—
7
0
to IRQ
Description
A/D converter interrupt requests have priority level 0 (low priority) (Initial value)
A/D converter interrupt requests have priority level 1 (high priority)
Description
[Clearing conditions]
[Setting conditions]
0 is written in IRQnF after reading the IRQnF flag when IRQnF = 1.
IRQnSC = 0, IRQn input is high, and interrupt exception handling is carried
out.
IRQnSC = 1 and IRQn interrupt exception handling is carried out.
IRQnSC = 0 and IRQn input is low.
IRQnSC = 1 and a falling edge occurs in IRQn input
0
Flags (IRQ5F to IRQ0F): These bits indicate the status of IRQ
—
—
6
0
IRQ5F
R/(W) *
5
0
IRQ4F
R/(W) *
4
0
IRQ to IRQ flags
These bits indicate IRQ to IRQ
interrupt request status
IRQ3F
R/(W) *
Rev. 3.00 Mar 21, 2006 page 89 of 814
3
0
5
IRQ2F
R/(W) *
0
Section 5 Interrupt Controller
2
0
0
to IRQ
IRQ1F
R/(W) *
5
1
0
REJ09B0302-0300
5
interrupt
(Initial value)
IRQ0F
R/(W) *
0
0
0
5
to