DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 234

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 8 DMA Controller
Bit 7—Data Transfer Master Enable (DTME): Together with the DTE bit in DTCRA, this bit
enables or disables data transfer. When the DTME and DTE bits are both set to 1, the channel is
enabled. When an NMI interrupt occurs DTME is cleared to 0, suspending the transfer so that the
CPU can use the bus. The suspended transfer resumes when DTME is set to 1 again. For further
information on operation in block transfer mode, see section 8.6.6, NMI Interrupts and Block
Transfer Mode.
DTME is set to 1 by reading the register while DTME = 0, then writing 1.
Bit 6—Reserved: Although reserved, this bit can be written and read.
Bit 5—Destination Address Increment/Decrement (DAID) and Bit 4—Destination Address
Increment/Decrement Enable (DAIDE): These bits select whether the destination address
register (MARB) is incremented, decremented, or held fixed during the data transfer.
Bit 3—Transfer Mode Select (TMS): Selects whether the source or destination is the block area
in block transfer mode.
Rev. 3.00 Mar 21, 2006 page 204 of 814
REJ09B0302-0300
Bit 7: DTME
0
1
Bit 5: DAID
0
1
Bit 3: TMS
0
1
Bit 4: DAIDE Description
0
1
0
1
Description
Data transfer is disabled (DTME is cleared to 0 when an NMI interrupt occurs)
Data transfer is enabled
Description
Destination is the block area in block transfer mode
Source is the block area in block transfer mode
MARB is held fixed
MARB is incremented after each data transfer
MARB is held fixed
MARB is decremented after each data transfer
If DTSZ = 0, MARB is incremented by 1 after each data transfer
If DTSZ = 1, MARB is incremented by 2 after each data transfer
If DTSZ = 0, MARB is decremented by 1 after each data transfer
If DTSZ = 1, MARB is decremented by 2 after each data transfer
(Initial value)
(Initial value)
(Initial value)