DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 447

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

11.3.4
Sample Setup Procedure for Non-Overlapping TPC Output: Figure 11.6 shows a sample
procedure for setting up non-overlapping TPC output.
ITU setup
Port and
TPC setup
ITU setup
Figure 11.6 Setup Procedure for Non-Overlapping TPC Output (Example)
Non-Overlapping TPC Output
Select non-overlapping groups
Select TPC transfer trigger
Set next TPC output value
Select counting operation
Set next TPC output data
Select interrupt requests
Set initial output data
Enable TPC transfer
Select GR functions
Compare match A?
Set up TPC output
Non-overlapping
Set GR values
Start counter
TPC output
Yes
Section 11 Programmable Timing Pattern Controller
No
1
2
3
4
5
6
7
8
9
10
11
12
1. Set TIOR to make GRA and GRB
2. Set the TPC output trigger period in
3. Select the counter clock source with bits
4. Enable the IMFA interrupt in TIER. The
5. Set the initial output values in the DR
6. Set the DDR bits of the input/output port
7. Set the NDER bits of the pins to be
8. In TPCR, select the ITU compare match
9. In TPMR, select the groups that will
10. Set the next TPC output values in the
11. Set the STR bit to 1 in TSTR to start the
12. At each IMFA interrupt, write the next
Rev. 3.00 Mar 21, 2006 page 417 of 814
output compare registers (with output
inhibited).
GRB and the non-overlap margin in
GRA.
TPSC2 to TPSC0 in TCR. Select the
counter clear source with bits CCLR1
and CCLR0.
DMAC can also be set up to transfer
data to the next data register.
bits of the input/output port pins to be
used for TPC output.
pins to be used for TPC output to 1.
used for TPC output to 1.
event to be used as the TPC output
trigger.
operate in non-overlap mode.
NDR bits.
timer counter.
output value in the NDR bits.
REJ09B0302-0300