DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 545

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Interrupt Operations: The smart card interface has three interrupt sources: transmit-data-empty
(TXI), transmit/receive-error (ERI), and receive-data-full (RXI). The transmit-end interrupt
request (TEI) is not available in smart card mode.
A TXI interrupt is requested when the TEND flag is set to 1 in SSR. An RXI interrupt is requested
when the RDRF flag is set to 1 in SSR. An ERI interrupt is requested when the ORER, PER, or
ERS flag is set to 1 in SSR. These relationships are shown in table 14.8.
Table 14.8 Smart Card Mode Operating States and Interrupt Sources
Operating State
Transmit mode
Receive mode
Data Transfer by DMAC: The DMAC can be used to transmit and receive in smart card mode,
as in normal SCI operations. In transmit mode, when the TEND flag is set to 1 in SSR, the TDRE
flag is set simultaneously, generating a TXI interrupt. If TXI is designated in advance as a DMAC
activation source, the DMAC will be activated by the TXI request and will transfer the next
transmit data. This data transfer by the DMAC automatically clears the TDRE and TEND flags to
0. When an error occurs, the SCI automatically retransmits the same data, keeping TEND cleared
to 0 so that the DMAC is not activated. The SCI and DMAC will therefore automatically transmit
the designated number of bytes, including retransmission when an error occurs. When an error
occurs the ERS flag is not cleared automatically, so the RIE bit should be set to 1 to enable the
error to generate an ERI request, and the ERI interrupt handler should clear ERS.
When using the DMAC to transmit or receive, first set up and enable the DMAC, then make SCI
settings. DMAC settings are described in section 8, DMA Controller.
In receive operations, when the RDRF flag is set to 1 in SSR, an RXI interrupt is requested. If RXI
is designated in advance as a DMAC activation source, the DMAC will be activated by the RXI
request and will transfer the received data. This data transfer by the DMAC automatically clears
the RDRF flag to 0. When an error occurs, the RDRF flag is not set and an error flag is set instead.
The DMAC is not activated. The ERI interrupt request is directed to the CPU. The ERI interrupt
handler should clear the error flags.
Normal operation
Error
Normal operation
Error
TEND
RDRF
Flag
ERS
PER, ORER
Rev. 3.00 Mar 21, 2006 page 515 of 814
Mask Bit
TIE
RIE
RIE
RIE
Section 14 Smart Card Interface
Interrupt
Source
TXI
ERI
RXI
ERI
REJ09B0302-0300
DMAC
Activation
Available
Not available
Available
Not available