DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 521

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

The receive margin in asynchronous mode can therefore be expressed as in equation (1).
From equation (1), if F = 0 and D = 0.5 the receive margin is 46.875%, as given by equation (2).
This is a theoretical value. A reasonable margin to allow in system designs is 20% to 30%.
Restrictions on Usage of DMAC: To have the DMAC read RDR, be sure to select the SCI
receive-data-full interrupt (RXI) as the activation source with bits DTS2 to DTS0 in DTCR.
Restrictions on Usage of the Serial Clock: When transmitting data using the serial clock as an
external clock, after clearing SSR of TDRE, maintain the space between each frame of the lead of
the transmission clock (start-up edge) at five states or more (see Figure 13.22). This condition is
also needed for continuous transmission. If it is not fulfilled, operational error will occur.
SCK
TDRE
TXD
Note: *
Ensure that t
M = (0.5 –
M: Receive margin (%)
N: Ratio of clock frequency to bit rate (N = 16)
D: Clock duty cycle (D = 0 to 1.0)
L:
F:
D = 0.5, F = 0
M = {0.5 – 1/(2
= 46.875% ............................................................................................. (2)
t*
Frame length (L = 9 to 12)
Absolute deviation of clock frequency
X0
5 states.
2N
Figure 13.22 Serial Clock Transmission (Example)
1
X1
) – (L – 0.5) F –
16)}
X2
100%
X3
X4
D – 0.5
N
X5
(1 + F)
Section 13 Serial Communication Interface
X6
Rev. 3.00 Mar 21, 2006 page 491 of 814
X7
100% ................... (1)
t*
Y0
Continuous transmission
Y1
REJ09B0302-0300
Y2
Y3