DF3052BX25V Renesas Electronics America, DF3052BX25V Datasheet - Page 595

• Manufacturer Part Number: DF3052BX25V
• Description: MCU 5V 512K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3052BX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18.5
18.5.1
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode for addresses H'00000 to H'3FFFF is entered by setting SWE1 bit to 1 when
FWE = 1, then setting the PV1 or EV1 bit. Program mode for addresses H'00000 to H'3FFFF is
entered by setting SWE1 bit to 1 when FWE = 1, then setting the PSU1 bit, and finally setting the
P1 bit. Erase mode for addresses H'00000 to H'3FFFF is entered by setting SWE1 bit to 1 when
FWE = 1, then setting the ESU1 bit, and finally setting the E1 bit. FLMCR1 is initialized by a
power-on reset, and in hardware standby mode and software standby mode. Its initial value is H'80
when a high level is input to the FWE pin, and H'00 when a low level is input. When on-chip flash
memory is disabled, a read will return H'00, and writes are invalid.
Writes are enabled only in the following cases: Writes to bit SWE1 of FLMCR1 enabled when
FWE = 1, to bits ESU1, PSU1, EV1, and PV1 when FWE = 1 and SWE1 = 1, to bit E1 when
FWE = 1, SWE1 = 1 and ESU1 = 1, and to bit P1 when FWE = 1, SWE1 = 1, and PSU1 = 1.
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing.
Bit 7: FWE
0
1
Bit 6—Software Write Enable Bit 1 (SWE1): Enables or disables flash memory programming
and erasing (applicable addresses: H'00000 to H'3FFFF). Set this bit when setting bits 5 to 0, bits 7
to 0 of EBR1, and bits 3 to 0 of EBR2.
Bit 6: SWE1
0
1
Note: * Do not execute a SLEEP instruction while the SWE1 bit is set to 1.
Bit
Initial value
Read/Write
Register Descriptions
Flash Memory Control Register 1 (FLMCR1)
FWE
1/0
R
7
Description
When a low level is input to the FWE pin (hardware-protected state)
When a high level is input to the FWE pin
Writes disabled
Writes enabled *
[Setting condition]
When FWE = 1
Description
SWE1
R/W
6
0
ESU1
R/W
5
0
PSU1
R/W
4
0
Rev. 3.00 Mar 21, 2006 page 565 of 814
R/W
EV1
3
0
R/W
PV1
2
0
REJ09B0302-0300
R/W
Section 18 ROM
E1
1
0
(Initial value)
R/W
P1
0
0