TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 132

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Address
6.6.14. Registers for Chip Configuration
Use Double Word (LD/SD) or Word (LW/SW) load/store to access register.
Rev. 3.1 November 1, 2005
0xD218
0xD220
0xD228
Configuration
0xE000
0xE008
0xE010
0xE018
0xE020
0xE030
0xE048
0xE050
0xE058
0xE060
0xE068
0xE070
0xE100
0xE108
0xE110
0xE118
LD/SD
LE/BE
Offset Address
(LE)
0xD218
0xD21C
(LE)
0xD220
0xD224
(LE)
0xD228
0xD22C
0xE000
0xE004
0xE008
0xE00C
0xE010
0xE014
0xE018
0xE01C
0xE020
0xE024
0xE030
0xE034
0xE048
0xE04C
0xE050
0xE054
0xE058
0xE05C
0xE060
0xE064
0xE068
0xE06C
0xE070
0xE074
0xE100
0xE104
0xE108
0xE10C
0xE110
0xE114
0xE118
0xE11C
LW/SW
LE/BE
(BE)
0xD21C
0xD218
(BE)
0xD224
0xD220
(BE)
0xD22C
0xD228
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
Register Size
64
64
64
Table 6-22 Internal Registers for Chip Configuration
(bit)
CCFG
REVID
PCFG
TOEA
CLKCTR
GARBC
RAMP
-
-
DSKWCTRL
MCLKOSC
MCLKCTL
GPIOMR1
GPIODR1
GPIOMR2
GPIODR2
PDMCTR
PDMCFG
PDMSTATUS
Register
Symbol
6-22
Chip Configuration Register
Chip Revision ID Register
Pin Configuration Register
Timeout Error Access Address Register
Clock Control Register
G-Bus Arbiter Control Register
Register Address Mapping Register
Reserved
Reserved
DLL DeSkew Control Register
Audio Clock PLL set-up
Audio Clock Operation Control
GPIO Mode Register 1
GPIO Data Register 1
GPIO Mode Register 2
GPIO Data Register 2
PDMAC Count Register
PDMAC Configuration Register
PDMAC Status Register
Register Name
Toshiba RISC Processor
TX4939
6
6