TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 226
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
Available stocks
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NSC
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872
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NDFMC
10.2. Block diagram
10.2.1. Theory of Operation
NAND has 6 control signals, such as CE*, R/B, WE*, RE*, ALE, and CLE.
To reduce number of pins directly from TX4939XBG, external latch is used.
NDLA signal is the latch signal. As the R/B (Ready/Busy) signal is input, it uses one dedicated pin.
Since CE* signal needs to be controlled independently from other signal, it also use dedicated pin.
Eventually, the NDFMC (NAND Flash Memory Controller) shares SA [5:0] and SADB [15:0]. However, the assertion of
ND_CE, which means certain NAND chip is online, does not hold these signals, i.e. SA, SADB, all the time.
Those buses will be used when NDFMC does data transfer or update the control signals, i.e. NDCLE, NDALE, NDRE*, and
NDWE*. Actual arbitration with EBC might happen in this timing, which is associating with internal bus transactions.
Rev. 3.1 November 1, 2005
Register Address
Timing Control
DMA Handler
Controller
Figure 10-1 NAND Flash Memory Controller Block Diagram
TX4939XBG
Decoder
NAND
Host I/F
10-2
Pins: NDLA, NDRB*, and
NDCE* are dedicated for
SA[0]
SA[1]
SA[2]
SA[3]
SA[4]
SA[5]
NDRB*
NDLA
NDCE*
NAND Controller.
SADB[10]
SADB[11]
SADB[12]
SADB[13]
SADB[14]
SADB[15]
SADB[0]
SADB[1]
SADB[2]
SADB[3]
SADB[4]
SADB[5]
SADB[6]
SADB[7]
SADB[8]
SADB[9]
D0
D1
D2
D3
D4
D5
D6
D7
EN
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
NDCLE
NDCS0
NDCS1
NDALE
Toshiba RISC Processor
NDWE*
NDRE*
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
I/O16
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
I/O8
I/O9
CLE
WE*
ALE
RE*
R/B
CE*
WP
To CE* of Other NAND
Expandable Max 4 chip
TX4939
Rev 1.02
10
10
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