TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 488
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
Available stocks
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Manufacturer
Quantity
Price
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NSC
Quantity:
872
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20 000
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ATA100
17.5.5. Issuing Timing of Reset Signal
The above figure is a timing chart that shows the RESETN signal that is input to the device by setting bit [11] of the System
Control Register to “1”. As you can see from the above timing chart, the system is configured so you can send an interrupt
signal to the microcontroller simultaneous to automatically clearing the above bit when the time set by the Host Reset Timer
Register elapses.
Rev. 3.1 November 1, 2005
ATA_CLK
RESETN
INTN
17-34
Toshiba RISC Processor
TX4939
17
17
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