TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 543

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

EMAC
18.4.3.3. Transmission Threshold Register (TxThrsh) 0x08
The Transmission Threshold Register uses part of internal RAM, so it is not affected by hardware resets or software
resets.
The Transmission Threshold Register controls buffer latency when transmitting packets. If the threshold value is not “0”,
data transfer to the MAC starts either when the number of data bytes set by the threshold value (TxThold) has
accumulated in the DMA Transmission buffer or when an entire packet is stored in the DMA Transmission buffer. When
the threshold value is “0”, data is transferred to the MAC immediately after the data is fetched from the PCI Bus. The
software driver initializes the Transmission Threshold Register.
When the threshold value (TxThold) is too small, the DMA Transmission buffer immediately becomes free due to the PCI
Bus latency. This situation is displayed in the MAC transmission status, so the system software increases the threshold
value.
Be careful to not make the threshold value greater than 1620. Having a threshold value greater than 1620 when in the
Long Packet mode causes buffer memory to become full before transmission is enabled, therefore causing the
transmission circuit to hang.
Rev. 3.1 November 1, 2005
Bits
31 : 11
10 : 0
Default
Default
Name
Name
TYPE
TYPE
31
15
Mnemonic
TxThold
30
14
RESERVED
29
13
Field Name
Reserved
Transmission Threshold Register TxThold (Default: -, R/W)
28
12
Figure 18-35 Transmission Threshold Register
27
11
26
10
25
9
18-51
RESERVED
Description
The Transmission Threshold Register controls buffer latency
when transmitting packets.
24
8
23
7
22
6
TxThold
R/W
21
5
-
20
4
Toshiba RISC Processor
19
3
18
2
17
1
TX4939
16
0
18
18