TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 476

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

ATA100
17.3.3.21. Bus Transfer Count Low Register (CC8h)
This is the lower register that is used with the Bus Transfer Count High Register.
17.3.3.22. ATA Device Timing Error Register (CD0h)
You can use this register to confirm the status when performing ATA data transfer and timing of a control signal that the
device provides to this controoler is out of spec. Writing “1” to each bit clears the status.
Rev. 3.1 November 1, 2005
BIT
Bit[5]:
Bit[4]:
Bit[3]:
Bit[2]:
Bit[1]:
Bit[0]:
Bit 15
Bit 15
Bit 7
Bit 7
R
R
0
0
0
0
-
-
Not Used
NAME
PIO_t
DMA_t
DMA_t
DMA_t
DMA_t
DMA_t
Bit 14
Bit 14
Bit 6
Bit 6
B
R
R
0
0
0
0
-
-
FS
LI
RFS
RP
SS
Figure 17-26 Bus Transfer Count Low Register
Figure 17-27 ATA Device Timing Error Register
PIO_tB
Bit 13
Bit 13
Bit 5
Bit 5
Table 17-7 ATA Device Timing Error Register
R/W
R
R
0
0
0
0
-
Description
Timing that is out of the tB spec occurred during PIO mode transfer.
Timing that is out of the tFS spec occurred during Ultra DMA mode transfer.
Timing that is out of the tLI spec occurred during Ultra DMA mode transfer.
Timing that is out of the tRFS spec occurred during Ultra DMA mode transfer. However,
error detection is not implemented when in Host terminate an Ultra DMA data-in burst
Mode0-3.
Timing that is out of the tRP spec occurred during Ultra DMA mode transfer.
Timing that is out of the tSS spec occurred during Ultra DMA mode transfer.
Bus Master Transfer Count[15:8]
Bus Master Transfer Count[7:0]
DMA_tFS
Bit 12
Bit 12
Bit 4
Bit 4
R/W
R
R
0
0
0
0
-
17-22
Not Used
DMA_tLI
Bit 11
Bit 11
Bit 3
Bit 3
R/W
R
R
0
0
0
0
-
DMA_tRFS
Bit 10
Bit 10
Bit 2
Bit 2
R/W
R
R
0
0
0
0
-
Toshiba RISC Processor
DMA_tRP
Bit 9
Bit 1
Bit 9
Bit 1
R/W
R
R
0
0
0
0
-
DMA_tSS
Bit 8
Bit 0
Bit 8
Bit 0
R/W
R
R
0
0
0
0
-
TX4939
17
17