TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 416

no-image

TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TX4939XBG-400
Manufacturer:
NSC
Quantity:
872
Part Number:
TX4939XBG-400
Manufacturer:
TOSHIBA
Quantity:
10 440
Part Number:
TX4939XBG-400
Manufacturer:
XILINX
0
Part Number:
TX4939XBG-400
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
PCIC
16.4.31. G2P Memory Space 1 G-Bus Base Address Register (G2PM1GBASE)
Rev. 3.1 November 1, 2005
Default
Default
Default
Default
NAME
NAME
NAME
NAME
Bit
63:38
37
36
35:8
7:0
TYPE
TYPE
TYPE
TYPE
Mnemonic
BSWAP
EXFER
BA[35:8]
63
47
31
15
62
46
30
14
Field Name
Rsvd
Byte Swap
Endian Transfer
Memory Space
Base Address 1
Rsvd
Figure 16-42 G2P Memory Space 1 G-Bus Base Address Register
Table 16-43 G2P Memory Space 1 G-Bus Base Address Register
61
45
29
13
60
44
28
12
BA[15:8]
0x00
R/W
RESERVED
59
43
27
11
Description
Byte Swap Disable
(Default: Little Endian Mode: 0x1; Big Endian Mode: 0x0) Sets the byte
swapping of Memory Space 1.
1: Do not perform byte swapping.
0: Perform byte swapping.
Please use the default state in most situations. If this bit is changed to “1”
when in the Big Endian Mode, the byte order of transfer to Memory Space 0
through DWORD (32-bit) access will not change.
See detail in 16.3.10 Endian Switching Function
Endian Transfer
(Default: Little Endian Mode: 0x0; Big Endian Mode: 0x1)
Sets the Endian Transfer of Memory Space 1.
1: Performs Endian Transfer.
0: Does not perform Endian Transfer.
Please use the default state.
See detail in 16.3.10 Endian Switching Function
Base Address (Default: 0x0_0000_00)
Sets the G-Bus base bus address of Memory Space 1 for initiator access.
Can set the base address in 256-byte units.
58
42
26
10
57
41
25
9
16-52
RESERVED
56
40
24
BA[31:16]
8
0x0000
R/W
55
39
23
7
54
38
22
6
0x0/0x1 0x0/0x1
BSWAP EXFER
R/W
53
37
21
5
RESERVED
R/W
52
36
20
Toshiba RISC Processor
4
0x00
R
51
35
19
3
50
34
18
BA[35:32]
2
R/W
0x0
49
33
17
1
R/W
R/W
R/W
R/W
R
TX4939
48
32
16
0
16
16

Related parts for TX4939XBG-400