TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 348

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

DDR
15.9. Register Map
Register must be accessed using 32-bit or 64-bit load and store instructions.
Rev. 3.1 November 1, 2005
0x8000
0x8008
0x8010
0x8018
0x8020
0x8028
0x8030
0x8038
0x8040
0x8048
0x8050
0x8058
0x8060
0x8068
0x8070
0x8078
0x8080
0x8088
0x8090
0x8098
0x80A0
0x80A8
0x80B0
0x80B8
0x80C0
0x80C8
0x80D0
0x80D8
0x80E0
0x80E8
0x80F0
0x80F8
0x8100
0x8108
0x8110
0x8118
0x8120
0x8128
0x8130
0x8138
0x8140
0x8148
0x8150
0x8158
0x8160
0x8168
0x8170
Address
Offset
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
Width
Bit
DDRCTL00
DDRCTL01
DDRCTL02
DDRCTL03
DDRCTL04
DDRCTL05
DDRCTL06
DDRCTL07
DDRCTL08
DDRCTL09
DDRCTL10
DDRCTL11
DDRCTL12
DDRCTL13
DDRCTL14
DDRCTL15
DDRCTL16
DDRCTL17
DDRCTL18
DDRCTL19
DDRCTL20
DDRCTL21
DDRCTL22
DDRCTL23
DDRCTL24
DDRCTL25
DDRCTL26
DDRCTL27
DDRCTL28
DDRCTL29
DDRCTL30
DDRCTL31
DDRCTL32
DDRCTL33
DDRCTL34
DDRCTL35
DDRCTL36
DDRCTL37
DDRCTL38
DDRCTL39
DDRCTL40
DDRCTL41
DDRCTL42
DDRCTL43
DDRCTL44
DDRCTL45
DDRCTL46
Register
Symbol
DDR_CTL_00
DDR_CTL_01
DDR_CTL_02
DDR_CTL_03
DDR_CTL_04
DDR_CTL_05
DDR_CTL_06
DDR_CTL_07
DDR_CTL_08
DDR_CTL_09
DDR_CTL_10
DDR_CTL_11
DDR_CTL_12
DDR_CTL_13
DDR_CTL_14
DDR_CTL_15
DDR_CTL_16
DDR_CTL_17
DDR_CTL_18
DDR_CTL_19
DDR_CTL_20
DDR_CTL_21
DDR_CTL_22
DDR_CTL_23
DDR_CTL_24
DDR_CTL_25
DDR_CTL_26
DDR_CTL_27
DDR_CTL_28
DDR_CTL_29
DDR_CTL_30
DDR_CTL_31
DDR_CTL_32
DDR_CTL_33
DDR_CTL_34
DDR_CTL_35
DDR_CTL_36
DDR_CTL_37
DDR_CTL_38
DDR_CTL_39
DDR_CTL_40
DDR_CTL_41
DDR_CTL_42
DDR_CTL_43
DDR_CTL_44
DDR_CTL_45
DDR_CTL_46
Register Name
15-18
-
WR, RD
RD, RW
RW, RD
RD, RD
RW, RD
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, WR
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RW, RW
RD, RW
-
-
-
RD
RW
RW
RW
RW
RD
RD
RD
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Access
TRCD_INT, TRAS_LOCKOUT
Reservred
INT_ACK, INT_STATUS
OUT_OF_RANGE_LENGTH, INT_MASK
START, OUT_OF_RANGE_TYPE
MAX_COL_REG, MAX_ROW_REG
INITAREF, MAX_CS_REG
CASLAT, CASLAT_LIN
TWR, BSTLEN
TPDEX, TRRD
TRAS_MIN, TRC
TEMRS, TRP
TRFC, TMRD
TWTR, TDLL
AREFRESH, WRITEINTERP
POWER_DOWN, CS_MAP
SREFRESH, TXSR
AP, DRIVE_DQ_DQS
INTRPTREADA, CONCURRENTAP
INTRPTAPBURST, INTRPTWRITEA
DLL_BYPASS_MODE,
REG_DIMM_ENABLE
COLUMN_SIZE, ADDR_PINS
DLL_LOCK
Reserved
Reserved
Reserved
VERSION
TREF
TRAS_MAX
TINIT
EMRS_DATA
OUT_OF_RANGE_ADDR[15:0]
OUT_OF_RANGE_ADDR[30:16]
TC300C_DLL_LOCK
TC300C_WR_DQS_SHIFT
TC300C_DQS_OUT_SHIFT
TC300C_WR_DQS_SUB
TC300C_DQS_OUT_SUB
TC300C_DLL_DQS_DELAY_0
TC300C_DLL_DQS_DELAY_1
TC300C_DLL_DQS_DELAY_2
TC300C_DLL_DQS_DELAY_3
TC300C_DLL_DQS_SUB_0
TC300C_DLL_DQS_SUB_1
TC300C_DLL_DQS_SUB_2
TC300C_DLL_DQS_SUB_3
Parameter(s)
Toshiba RISC Processor
NO_CMD_INIT
APREBIT
TX4939
15
15