TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 470
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
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ATA100
You can use this register when reading/writing to LBA Mid Register of the device. Access to the device ATA Register begins
when TX4939 accesses this register.
The following signals correspond to the following register addresses: CS0N → 0, CS1N → 1, HA[2:0] → 4h.
17.3.3.12. LBA High Register ATA Shadow (005h)
You can use this register when reading/writing to LBA High Register of the device. Access to the device ATA Register begins
when TX4939 accesses this register.
The following signals correspond to the following register addresses: CS0N → 0, CS1N → 1, HA[2:0] → 5h.
17.3.3.13. Device/Head Register ATA Shadow (006h)
You can use this register when reading/writing to Device/Head Register of the device. Access to the device ATA Register
begins when TX4939 accesses this register.
The following signals correspond to the following register addresses: CS0N → 0, CS1N → 1, HA[2:0] → 6h.
Rev. 3.1 November 1, 2005
Bit 7
Bit 7
Bit 7
R/W
R/W
R/W
0
0
0
Bit 6
Bit 6
Bit 6
R/W
R/W
R/W
0
0
0
Figure 17-17 LBA High Register ATA Shadow
Bit 5
Bit 5
Bit 5
R/W
Figure 17-16 LBA Mid Register ATA Shadow
R/W
R/W
Figure 17-18 Device Register ATA Shadow
0
0
0
Bit 4
Bit 4
Bit 4
R/W
R/W
R/W
LBA High Register
LBA Mid Register
0
0
0
Device Register
17-16
Bit 3
Bit 3
Bit 3
R/W
R/W
R/W
0
0
0
Bit 2
Bit 2
Bit 2
R/W
R/W
R/W
0
0
0
Toshiba RISC Processor
Bit 1
Bit 1
Bit 1
R/W
R/W
R/W
0
0
0
Bit 0
Bit 0
Bit 0
R/W
R/W
R/W
0
0
0
TX4939
17
17
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