TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 183

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

INTC
8.4.12. Interrupt Current Status Register (IRCS)
Rev. 3.1 November 1, 2005
Bit
31:17
16
15:11
10:8
7:6
5:0
31
15
30
14
Mnemonic
⎯
IF
⎯
LVL
⎯
CAUSE
Reserved
29
13
28
12
27
11
Field Name
⎯
Interrupt Flag
⎯
Interrupt Level
⎯
Interrupt Cause
Figure 8-15 Interrupt Current Status Register
Table 8-17 Interrupt Current Status Register
26
10
LVL
R/O
000
25
9
RESERVED
24
Explanation
Reserved
Interrupt Flag (Default: 1)
This bit indicates the interrupt generation status.
0: Interrupt requests have been generated.
1: Interrupt requests have not been generated
Reserved
Interrupt Level (Default: 000)
These bits specify the level of the interrupt request that was
reported to the TX49/H4 core.
[0]
[1]
[2]
[3]
[4]
[5]
[6]
[7]
Reserved
Interrupt Cause (Default: 0x00)
These bits specify the number of original interrupt cause
specified in the column "IRCS.CAUSE Bits" in Table 8-1 TX4939
Interrupt Sources.
8
8-21
23
Reserved
7
000:
001:
010:
011:
100:
101:
110:
111:
22
6
Interrupt level 0
Interrupt level 1
Interrupt level 2
Interrupt level 3
Interrupt level 4
Interrupt level 5
Interrupt level 6
Interrupt level 7
21
5
20
4
19
3
CAUSE
000000
R/O
18
2
Toshiba RISC Processor
17
1
0xE8B8
R/O
16
IF
1
0
: Default
: Default
R/W
⎯
R
⎯
R
⎯
R
: Type
: Type
TX4939
8
8