TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 481

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

ATA100
17.4.2. Multiword DMA mode data transfer
The above figure is a timing diagram that shows read/write transfer by Multiword DMA Mode 2. Following are the steps for
setting up the software used when transferring data.
Use bits [7:4] of the System Control Register. Select the Multiword DMA mode and set bit [1] of the System Control Register.
Wait for a transfer end interrupt or an interrupt from the device. Confirm that the transfer process has ended, then transition
to the next process.
Following is a description of the meaning of each control signal.
Rev. 3.1 November 1, 2005
(The same as for PIO transfer.)
ATD_OUT
DIOWN
ATDBUS_E
ATD_IN
DIORN
ATA_CLK
HA
CS1N
CS0N
DMARQ
DMACKN
(1)
(2) – (7)
(8)
DMARQ: DMA request signal that is input from the device. This signal starts the data transfer process
DMACKN
:
DIORN:
DIOWN: This signal is used as a strobe signal when transferring data from the controller to the device.
Use bits [7:4] of the System Control Register. Select the Multiword DMA mode and set bit [1] of
the System Control Register.
Wait for a transfer end interrupt and an interrupt from the device. Confirm that the transfer
process has ended, then transition to the next process.
when it is input to the Controller.
Receives the DMARQ signal, then starts the actual transfer process when this controller
completes preparations for data transfer.
This signal is used as a strobe signal when transferring data from the device to the controller.
(The same as for PIO transfer.)
17-27
Toshiba RISC Processor
Read
TX4939
Write
17
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