TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 672
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
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ACLINK
24.4.10. ACLC GPO Data Register
This register specifies GPIO (slot 12) output data.
Writing a value into this register needs several BITCLK cycles to take effect.
access be executed until the previous write access takes effect (completes), by reading the ACGPODAT.WRPEND bit
prior to writing this register.
reason.
Rev. 3.1 November 1, 2005
Default:
Default:
Name:
Name:
R/W:
R/W:
Bit
31:20
20
19:1
0
Bit:
Bit:
Mnemonic Field Name
⎯
WRPEND
GPODAT
⎯
31
15
30
14
Reserved
Write Pending
GPIO-Out data
⎯
29
13
If it is set for a long time, the BITCLK signal on the AC-link is probably inactive for whatever
28
12
27
11
Description
WRPEND: Write Pending
GPODAT: GPIO-Out data
Figure 24-15 ACGPODAT Register
Table 24-17 ACGPODAT Register
Reserved
R
R
W
R
26
10
0:
1:
Reads back the value previously written to this field.
Writes data to the outgoing slot 12 bits[19:1].
Reads always ‘0’.
Indicates that the previous write operation is complete and
the ACGPODAT register is ready to be written.
Indicates that the previous write operation is not complete
and the ACGPODAT register is not yet ready to be written.
25
9
24-30
GPODAT
0x00000
R/W
24
8
23
7
22
6
The software must guarantee that no write
21
5
WRPE
ND
20
Toshiba RISC Processor
R
0
4
19
3
0xF744
18
GPODAT
2
0x00000
R/W
17
R/W
⎯
R
R/W
R
1
TX4939
Rsvd
16
R
0
0
24
24
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