TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 676
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
Available stocks
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Price
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872
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ACLINK
Writing a value into this register needs several BITCLK cycles to take effect.
access be executed until the previous write access takes effect (completes), by reading the ACSLTEN.WRPEND bit prior
to writing this register.
reason.
Rev. 3.1 November 1, 2005
Bit
2
1
0
Mnemonic Field Name
CENTSLT
SURRSLT
AUDOSLT
If it is set for a long time, the BITCLK signal on the AC-link is probably inactive for whatever
Disable Audio
Center slot
transmission
Disable Audio
Surround L&R
slot transmission
Disable Audio
PCM L&R slot
transmission
Description
CENTSLT: Disable Audio Center slot transmission.
SURRSLT: Disable Audio Surround L&R slot transmission.
AUDOSLT: Disable Audio PCM L&R slot transmission.
Table 24-19
W1C
W1C
W1C
0:
1:
0:
1:
0:
1:
No effect
Disables audio Center slot transmission.
No effect
Disables audio Surround L&R slot transmission.
No effect
Disables audio PCM L&R slot transmission.
24-34
ACSLTDIS Register
The software must guarantee that no write
Toshiba RISC Processor
R/W
W1C
W1C
W1C
TX4939
24
24
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