TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 594

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

Toshiba RISC Processor
SPI
TX4939
20.2. Block diagram
The SPI Module mainly consists of a 16-bit SPI Data Register (SPDR), a 16-bit Transmitter Buffer, a 16-bit Receiver Buffer,
a 16-bit Shift Register, a Baud Rate Generator, an Interframe Delay Time counter, and interrupt logic. Figure 20-1 is a block
diagram of the SPI Module.
IM-Bus
Bus I/F
Baud Rate
Interframe
Generator
Delay Time
Interrupt Logic
SPDR
Counter
Write
Read
Receiver Buffer (FIFO)
Transmitter Buffer
(FIFO)
Shift Register
SPIIN
SPICLK
SPIOUT
Rev 1.00
Figure 20-1 SPI Block Diagram
20
20
Rev. 3.1 November 1, 2005
20-2