TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 656

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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ACLINK
24.3.6.5. Slot Activation Control
In case ACLC is required to begin transmission or reception of multiple streams at the same time, slot activation control
will be useful.
Register (ACCTLEN), make sure the transmission FIFO becomes full by checking ACLC FIFO Status Register
(ACFIFOSTS)’s Full (xxxxFULL) bit, and finally enable ACLC Slot Enable Register (ACSLTEN).
assures that all the reception streams are activated at a frame and all the transmission streams begin to respond to the
slot-request bits of that frame.
Note that access to ACSLTEN and ACLC Slot Disable Register (ACSLTDIS) needs special care to synchronize with the
link-side.
Since operating ACCTLEN register and DMAC without touching ACSLTEN is sufficient for most usages, the initial
ACSLTEN value enables all the transmission and reception through the slots by default.
24.3.6.6. Variable Rate Limitation
To improve compatibility with existing AC’97 CODECs and controllers on the market, ACLC combines sample-data for the
slots 3 and 4 into one DMA channel, and similarly for the slots 7 and 8.
request bit from the CODEC for slot 4 shall be always same (in tandem) as for slot 3 for each frame, and similarly for the
slots 7 and 8.
as for slot 3 for each frame.
24.3.7. GPIO Operation
ACLC supports the slot 12 for the MC’97 (Modem Codec) GPIO.
The slot 12 is shadowed in the ACLC GPI Data Register (ACGPIDAT) and ACLC GPO Data Register (ACGPODAT) in
the following way:
This shadowing function is enabled as long as ACSLTEN allows.
The bit 0 of the slot 12 is defined as ‘GPIO_INT’ and can cause ACLC to request an interrupt.
Rev. 3.1 November 1, 2005
ACLC copies the slot 12 input data into the ACGPIDAT register, if the slot 12 input is marked by the CODEC as
valid in the AC-link frame period.
ACLC generates the slot 12 output data from the ACGPODAT register and mark it as valid, if the slot 12 is required
from the CODEC in the previous AC-link frame.
Refer to the register description for detail.
ACLC also considers that the slot valid bit from the CODEC for slot 4 shall be always same (in tandem)
To use this feature, the software must deactivate the relevant streams first, enable ACLC Control Enable
24-14
This feature effectively considers that the slot
Toshiba RISC Processor
This procedure
TX4939
24
24

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