TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 714

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TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

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Electrical
27.2.8. JTAG Interface
Standard JTAG interface is used for on chip debugging during Run Time mode. The TX49 Debug Support Unit has
following registers.
27.2.9. Processor Access Overview
The core processor can access external processor probe for reading and writing to external monitor memory, registers and
other external resources.
In addition the processor can execute from the external monitor memory located from 0xf_ff20 0000 to 0xf_ff2f ffff when the
ProbEnb bit is set and the processor probe is turned ON. Any access to the monitor location from 0xf_ff20 0000 to 0xf_ff3f
ffff are only allowed when the processor is in the debug mode (DM = 1).
27.2.10. Instruction
The instruction is a 8 bit field. Instructions for the TX49 Debug Support Unit are encoded between 0x80 and 0x9f and other
codes are reserved for Toshiba Standard JTAG instructions (Includes EXTEST, SAMPLE/PRELOAD and IDCODE) and so
on. Instructions are decoded as follows.
Any unused instruction between 0x80 and 0x9f defaulted to BYPASS instruction.
Rev. 3.1 November 1, 2005
Instruction Register
Bypass Register
Boundary-Scan Register
Device Identification Register
Implementation Register
JTAG_Data_Register
JTAG_Address_Register
JTAG_Control_Register
Hex Value
Note: 0x80 ∼ 0x9F are other code. Please do not use.
0x8A
0x8B
0xFF
0x00
0x01
0x02
0x03
0x83
0x88
0x89
0x90
EXTEST
SAMPLE/PRELOAD
Reserve
IDCODE
EJTAG_ImpCode
JTAG_ADDRESS_IR
JTAG_DATA_IR
JTAG_CONTROL_IR
JTAG_ALL_IR
PCTRACE
BYPASS
Instruction
Table 27-4 Instruction
27-6
Boundary Scan Register
Boundary Scan Register
Reserve
Device Identification Register
Select Implementation Register
Select JTAG_Address Register
Select JTAG_Data Register
Select JTAG_Control Register
Select JTAG_All Register
PCIRACE Instruction
Select BYPASS Register
Description
Toshiba RISC Processor
TX4939
27
27

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