TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 645
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
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ACLINK
24.3.1. CODEC Connection
The ACLC module has two SDIN (named as SDATA_IN in the AC’97 specification) signals and supports up to two
CODECs to be connected.
diagrams shown here is intended to provide conceptual understanding and some components may be necessary on the
actual circuit board to ensure proper electrical signals.
strapping recommendation described in the section D.5.2 of the AC’97 revision 2.1 specification.
24.3.1.1. Stereo Audio and Optional Modem Connection
Rev. 3.1 November 1, 2005
Figure 24-2 Stereo Audio and Optional Modem Connection Diagram
This section shows some system configuration diagrams for typical usages.
ACRESET*
ACLC
BITCLK
SDOUT
SDIN0
SDIN1
SYNC
Optional Modem CODEC (CODEC ID=’01’)
24-3
Audio CODEC (CODEC ID=‘00’)
The diagrams assume CODECs compliant with the CODEC ID
SYNC
BIT_CLK
SDATA_OUT
RESET#
SDATA_IN
SYNC
BIT_CLK
SDATA_OUT
RESET#
SDATA_IN
CID1
CID0
CID1
CID0
GND
Toshiba RISC Processor
Note that the
TX4939
24
24
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