TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 610
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
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CIR
21.4. Register Definition
21.4.1. CIR Control/Status Register (CIR_CSR)
Rev. 3.1 November 1, 2005
Bit
31:24
23:16
15:11
10
9
8
7
6:4
3:1
0
Reset Value
Reset Value
R/W/RO
R/W/RO
Name
Name
Bit
Bit
Length
8
8
5
1
1
1
3
3
1
1
RO
RO
31
15
0
0
RO
RO
30
14
0
0
RESERVED
Field Name
HIGH_IR
LOW_IR
Reserved
Ir_intpol
Ir_inten
Ir_irq
---
Ir_sclk
---
Ir_input
RO
RO
29
13
0
0
RO
RO
28
12
HIGH_IR
0
0
Figure 21-4 CIR Control/Status Register
Table 21-1 CIR Control/Status Register
RO
RO
27
11
0
0
Description
HIGH time count for Infrared Remote input.
If Count value reaches 8’hff, it will remain at 8’hff.
- If Ir_intpol = 0: This count register will get reload with new count value when
there is a L to H transition on CIR signal.
- If Ir_intpol = 1 then this count register will get reload with new count value when
there is a H to L transition on CIR signal.
LOW time count for Infrared Remote input
If Count value reaches 8’hff, it will remain at 8’hff.
- If Ir_intpol = 0: This count register will get reload with new count value when
there is a L to H transition on CIR signal.
- If Ir_intpol = 1 then this count register will get reload with new count value when
there is a H to L transition on CIR signal.
Reserved.
Infrared Interrupt option
Infrared Interrupt Enable
Infrared Remote Interrupt
Reading this register will clear this bit. If Ir_inten is disable (“0”), firmware can
treat this bit as valid bit. If this bit is “1” then the count value is valid.
Reserved
Infrared Remote Sample clock. Based on CLK4MHZ from clock module
(sys_cg), please refer to clock spec. for more information about CLK4MHZ.
Reserved
Infrared Remote Input signal
0: Select L to H transition (default)
1: Select H to L transition
0: Disable (default)
1: Enable
0: No interrupt/not Valid
1: interrupt/Valid
000: = 4.096 Mhz / 256
001: = 4.096 Mhz / 128
010: = 4.096 Mhz / 64
110: = 4.096 Mhz / 4
111: = 4.096 Mhz / 2
Ir_intpol Ir_inten Ir_irq Rsvd
R/W
RO
26
10
-----------
0
0
21-4
R/W
RO
25
0
9
0
RO
RO
24
0
8
0
RO
RO
23
0
7
0
(default)
R/W
RO
22
0
6
0
Ir_sclk
R/W
RO
21
0
5
0
R/W
RO
Toshiba RISC Processor
20
LOW_IR
0
4
0
RO
RO
19
0
3
0
Reserved
0xFC00
RO
RO
18
0
2
0
RO
RO
17
0
1
0
TX4939
Ir_input
RO
RO
16
0
0
?
21
21
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