TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 69

no-image

TX4939XBG-400

Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet

Specifications of TX4939XBG-400

Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TX4939XBG-400
Manufacturer:
NSC
Quantity:
872
Part Number:
TX4939XBG-400
Manufacturer:
TOSHIBA
Quantity:
10 440
Part Number:
TX4939XBG-400
Manufacturer:
XILINX
0
Part Number:
TX4939XBG-400
Manufacturer:
TOSHIBA/东芝
Quantity:
20 000
BLOCK
Rev. 3.1 November 1, 2005
External Bus Interface
the External bus has 8/16-bit data bus.
address signals
□ 8/16-bit External bus operation with DMA assistance
□ Direct Address SA [5:0] + Latched from SADB[15:0] + Latched from SA[5:0]
□ 4 independent channels
□ Supports access to ROM (mask ROM, page mode ROM, EPROM, EEPROM), SRAM,
□ Selectable 1/3, 1/4, 1/5, and 1/6 of GBUS/DDRCLK for SYSCLK
□ Supports the External Acknowledge Signal (ACK*) and External Ready Signal modes
□ NAND Flash Controller with DMA burst transfer mode.
□ Boot setting can be made from the following selections:
□ 3 channels of DMA are provided.
PCI Controller
Has an on-chip PCI Controller that complies with PCI External Bus Specification Revision 2.2.
□ Complies with PCI External Bus Specification Revision 2.2.
□ 32-bit PCI interface with maximum PCI clock frequency of 66 MHz.
□ Supports both the target and initiator functions.
□ Can change the address mapping between the internal bus and the PCI Bus.
□ Has an on-chip PCI Bus arbiter. Can connect up to 6 external bus masters each.
□ Has on-chip 1-channel DMA Controller dedicated to the PCI Controller (PCMAC).
□ Support Satellite Mode
□ Support PCI Boot
Serial I/O Port (SIO)
Has on-chip 4-channel asynchronous Serial I/O Interface (full duplex SIO ).
□ Full duplex SIO
□ On-chip baud rate generator
□ FIFO
Channel 0 for NOR Flash
Channel 1-3 for user peripherals
flash memory and I/O peripherals
- Data bus width: 8-bit or 16-bit
- ACK* output or ACK* input
- BWE pin (byte enable or byte Write enable)
- Boot channel clock frequency
PCI BOOT address moved to 0xFFFE_0000
On-chip 8-bit
On-chip 13-bit
16-bit bus mode
8-bit bus mode
×
×
8-stage FIFO for transmission
16-stage FIFO (data: 8 bits, status: 5 bits) for reception
×
4 channels
Address bus consists of 6 dedicated and 16+3 external latched
A[21:6] can be latched from SADB[15:0]
A[27:22] can be latched from SA[5:0]
A[28:23] can be latched from SA[5:0]
A[22:7] can be latched from SADB[15:0]
2-5
Toshiba RISC Processor
4 MB
256 MB
8 MB
512 MB
TX4939
2
2

Related parts for TX4939XBG-400