TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 369

• Manufacturer Part Number: TX4939XBG-400
• Manufacturer: Toshiba

Specifications of TX4939XBG-400

• Cpu Core: TX49/H4 90nm
• Clock Mhz/max Mips: 400/520
• Inst./data Cache: 32KB (4 Way)/32KB (4 Way)
• Tlb: x
• 1cycle Mac: x
• Volts (v): 1.25/2.5/3.3
• Peripherals: DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
• Companion Chip: TC86C001FG
• Package: PGBA456

PCIC
16.3.2. Satellite Mode
The TX4939 with Satellite Mode will provide a PCI Adapter card. Compare with Host Mode, there are some restrictions
described in Table 16-1 below.
16.3.3. PCI Boot
PCI BOOT Mode can be set during boot up. Please see Boot Configuration chapter for detail.
Two windows of the memory space from the G-Bus to the PCI Bus space are used when in the PCI Boot mode. The defaults
of several registers are changed as indicated Table 16-2 below.
Rev. 3.1 November 1, 2005
Note: The on-chip PCI Bus Arbiter cannot be used when the PCI Boot mode is being used while in the
Item#
1
2
3
Register Names
G-Bus base address (G2GBASE):
Space size (G2PM2MASK):
PCI Bus base address (G2PM2PBASE):
Initiator Memory Space 2 Enable (PCICCFG.G2PM2EN):
Bus Master bit (PCISTATUS.BM)
Target Configuration Access Ready (PCICSTAUTS.TCAR)
Satellite mode.
Area
Arbiter
PME
PCICLK In the current version of the TX4939, PCICLK can only be 33.33 MHz
Description
Internal arbiter can not be used in Satellite Mode. Instead, non used pins for internal arbiter will
be used different function as follows.
Power Management in Satellite Mode is not supported in this version.
Pin Name at Host
Mode
REQ[0]*
GNT[0]*
REQ[1]*
GNT[1]*
REQ[2:5]*
GNT[2:5]*
4 MB
Table 16-2 PCI BOOT Related Register Assignment
Input
Output
Input
Output
Input
Output
Table 16-1 Restrictions TX4939 in Satellite Mode
G-Bus Space
0xF_FFFF_FFFF
0x0_2000_0000
0x0_1FFF_FFFF
0x0_1FC2_0000
0x0_1FC1_FFFF
0x0_1FC0_0000
0x0_0000_0000
Figure 16-2 PCI BOOT default mapping
Pin Usage at Satellite Mode
REQ*
GNT*
INTOUT
IDSEL
GPIO[x]
GPIO[x]
16-5
Output
Input
Output
Input
I/O
I/O
PCI Memory Space
PCI Bus request from the TX4939
PCI Bus granted signal from Host
arbiter
Interrupt output from the TX4939
interrupt controller
PCI IDSEL input for PCI Configuration
Register access.
All signal can be used as extra GPIO
All signal can be used as extra GPIO
0xFF_FFFF_FFFF
0x00_FFFF_FFFF
0x00_FFFE_0000
0x00_0000_0000
0x0_1FC0_0000
Values
128 KB
0x00_FFFE_0000
1
1 [Only when in the Host mode]
1 [Only when in the Satellite mode]
Toshiba RISC Processor
128 KB
Comment
TX4939
16
16