TX4939XBG-400 Toshiba, TX4939XBG-400 Datasheet - Page 716
TX4939XBG-400
Manufacturer Part Number
TX4939XBG-400
Description
Manufacturer
Toshiba
Datasheet
1.TX4939XBG-400.pdf
(740 pages)
Specifications of TX4939XBG-400
Cpu Core
TX49/H4 90nm
Clock Mhz/max Mips
400/520
Inst./data Cache
32KB (4 Way)/32KB (4 Way)
Tlb
x
1cycle Mac
x
Volts (v)
1.25/2.5/3.3
Peripherals
DDR, NAND, ATA, ETHERNET, SECURITY, FPU, MMU, SPI, I2S, I2C, PCI, VIDEO, UART, TIMER, RTC
Companion Chip
TC86C001FG
Package
PGBA456
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Electrical
27.3. Processor Bus Break Function
This function is to monitor the interface to core and provide debug interruption or trace trigger for a given physical address
and data.
27.4. Debug Exception
Three kinds of debug exception are supported.
Note: During real time debugging, first two functions are disabled.
27.4.1. Debug Single Step (DSS)
When the debug register DSS bit is set, this exception has been raised each time one instruction is executed.
27.4.2. Debug Breakpoint exception (Dbp)
This exception is raised when SDBBP instruction is executed.
27.4.3. JTAG Break Exception
This exception is raised when JTAG unit set the Jtagbrk in JTAG_Control_Register.
27.4.4. Debug Exception Handling
Updates DEPC and Debug register.
Registers other than DEPC and Debug register retain their values.
27.4.5. Branching to debug handler
If the ProbEnb bit in JTAG_Control_Register[15] is set, the debug exception vector is located at
PC: 0xffff ffff ff20 0200
If the ProbEnb bit in JTAG_Conctrol_Register[15] is cleared, the debug exception vector is located at
PC: 0xffff ffff bfc0 0400
27.4.6. Exception handling when in Debug Mode (DM bit is set)
All interrupts including NMI are masked. When the NMI interrupt has occurred during Debug mode, it is stored internally
and the NMI interrupt is taken after debug handler is finished (DM is clear)
27.5. Real Time PC TRACE Output
In real time mode non-sequential Program Counter and trace information are outputted on TPC[3:0] and PCST[8:0] at 1/3 of
the processor clock speed.
Rev. 3.1 November 1, 2005
Debug Single Step (DSS bit)
Debug Breakpoint Exception (SDBBP Instruction)
JTAG Break Exception (Jtagbrk bit in JTAG_Control_Register)
27-8
Toshiba RISC Processor
TX4939
27
27
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