MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1014
MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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Operation
The CIPHER_SELECT field selects from one of sixteen possible encryption algorithms
(0=AES128). The CIPHER_MODE selects the mode of operation for that cipher (0=ECB,
1=CBC).
The KEY_SELECT field allows key selection for one of several sources. Keys can be
included in the packet payload or may come from OTP or write-only registers.
The HASH_SELECT field selects a hashing algorithm for the operation (0=SHA-1,
1=CRC32, 2=SHA-256).
The CIPHER_CONFIG field provides the optional configuration information for the selected
cipher. An example would be a key length for the RC4 algorithm.
13.2.6.4.4 Source Buffer
The SOURCE_BUFFER pointer (shown in the following table) specifies the location of
the source buffer in memory. The buffer may reside at any byte alignment and should refer
to an on-chip SRAM of off-chip SDRAM location. For optimal performance, buffers should
be word aligned. When the CONSTANT_FILL flag is set in the Control0 field, the value
in this field is used as the data written to all destination buffer locations.
13.2.6.4.5 Destination Buffer
The DESTINATION_BUFFER (shown in the following table) specifies the location of the
destination buffer in on-chip SRAM or off-chip SDRAM memory and may be set to any
byte alignment. For in-place encryption, the destination buffer and source buffer should be
the same value. For optimal performance, the buffer location should be word-aligned.
1014
31
31
30
30
CIPHER_CONFIG
29
29
28
28
27
27
26
26
25
25
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
24
24
23
23
Table 13-8. DCP Destination Buffer Field
22
22
Table 13-7. DCP Source Buffer Field
21
21
CONSTANT (CONSTANT_FILL mode)
20
20
19
19
HASH_SE-
DESTINATION_BUFFER
18
18
LECT
SOURCE_BUFFER
17
17
16
16
15
15
14
14
FRAMEBUFFER_LENGTH (in bytes, blit mode)
KEY_SELECT
13
13
12
12
11
11
10
10
09
09
08
08
CIPHER_MODE
07
07
Freescale Semiconductor, Inc.
06
06
05
05
04
04
03
03
CIPHER_SE-
02
02
LECT
01
01
00
00
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