MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2320

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Naming Convention
39.4 Naming Convention
The generated include files and macros follow a consistent naming convention that matches
the SOC documentation. This prevents name-space collisions and makes the macros easier
to remember.
//
// The include file for a specific hardware module is named:
//
//
//
// Every register has an associated typedef that provides a C definition of
// the register. The definition is always a union of a 32-bit unsigned int
// (i.e., reg32_t), and an anonymous bit field structure.
//
//
//
// Macros and defines that relate to a register as a whole are named:
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
// Macros and defines that relate to the fields of a register are named:
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
//
// Some hardware modules repeat the same register definition multiple times. An
// example is a block that implements multiple channels. For these registers,
// the name adds a lowercase 'n' after the module, and the HW_ macros take a
// numbered parameter to select the channel (or instance). This allows these
// macros to be used in for loops.
//
//
//
2320
regs<module>.h
hw_<module>_<regname>_t
HW_<module>_<regname>_ADDR
HW_<module>_<regname>_<SET | CLR | TOG>_ADDR
HW_<module>_<regname>
HW_<module>_<regname>_RD()
HW_<module>_<regname>_WR()
HW_<module>_<regname>_<SET | CLR | TOG>()
BM_<module>_<regname>_<field>
BP_<module>_<regname>_<field>
BF_<module>_<regname>_<field>()
BF_<module>_<regname>_<field>_V(<valuename>)
BW_<module>_<regname>_<field>()
BV_<module>_<regname>_<field>_<valuename>
HW_<module>n_<regname><macrotype>(n,...)
- defines for the indicated register address
- a define for accessing the primary register using the typedef.
- macros for reading/writing the primary register as a whole
- macros for writing the associated set | clear | toggle registers
- defines for the field's bit mask and bit position
- macros for generating a bit field value. The parameter is masked
- macro for writing a bit field. Usually expands to a CS operation.
- define equates to an unshifted named value for the field
- the n parameter must evaluate to an integer, and selects the channel
Should be used as an rvalue (i.e., for reading), but avoided as
an lvalue (i.e., for writing). Will usually generate RMW when
used as an lvalue.
and shifted to the field position.
Not generated for read-only fields.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.