MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1685

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
26.4.32 ENET MAC Frame Truncation Length Register
Address:
Re-
26.4.33 ENET MAC Accelerator Transmit Function Configuration
Transmit Accelerator function configuration. Control accelerator actions to be performed
when sending frames. The register can be changed before or after each frame, but must stay
unmodified during frame write into the transmit FIFO.
Address:
Freescale Semiconductor, Inc.
set
Reset
Bit
W
R
TRUNC_FL
Bit
31
W
TX_IPG_
LENGTH
RSRVD0
0
R
31 14
Field
Field
13 0
4 0
30
0
31
0
29
0
HW_ENET_MAC_IPACCTXCONF
800F_01C0h
HW_ENET_MAC_TRUNC_FL
(HW_ENET_MAC_TRUNC_FL)
Register (HW_ENET_MAC_IPACCTXCONF)
28
0
HW_ENET_MAC_TX_IPG_LENGTH field descriptions (continued)
30
0
Transmit Inter Packet Gap. Set, in Bytes, the IPG between transmitted Frames. Can be set to any value
between 8 and 27. If set to a Value below 8, the IPG is 8, if set to any value above 27, the IPG is 27.
Reserved bits. Write as 0.
Frame Truncation Length. Set the value from which a receive Frame is truncated (if greater than this value).
Should be a value greater or equal to RCR(MAX_FL).
Note: Truncation happens at TRUNC_FL, however when truncation occured, the application (FIFO) may
receive less data, guaranteeing that it will never receive more than the set limit.
27
0
26
0
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_ENET_MAC_TRUNC_FL field descriptions
24
0
28
0
RSRVD0
23
0
22
0
27
0
21
0
20
0
26
0
800F_0000h base + 1B0h offset = 800F_01B0h
19
0
800F_0000h base + 1C0h offset =
18
25
0
0
17
0
RSRVD0[31:16]
16
24
0
0
15
0
Description
Description
23
14
0
0
13
0
22
12
0
0
11
0
21
0
10
Chapter 26 Ethernet Controller (ENET)
1
1
9
20
0
1
8
TRUNC_FL
1
7
19
0
1
6
1
5
18
0
1
4
3
1
17
0
1
2
1
1
1685
16
0
1
0

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