MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1872

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
Address:
29.9.34 ENET SWI Port Snooping function. Eight independent entries
TCP/UDP Port number Snooping function configuration.
1872
Reset
Reset
FORCE_ENABLE
DESTINATION
Bit
Bit
W
W
RSRVD1
FORCE_
RSRVD0
R
R
31 4
Field
3 2
1
0
31
15
0
0
HW_ENET_SWI_FORCE_FWD_P0
800F_80BCh
are available. (HW_ENET_SWI_PORTSNOOP1)
30
14
0
0
Reserved bits. Write as 0.
When force is enabled, the bits define if the frame should be forwarded to the MAC at port 1 (bit2=1) and/or
the MAC at port 2 (bit(3=1)).
Note, it is possible to forward to one or both MAC ports.
If none of the bits is set, the force enable is ignored and the frame is processed normally. This can be used
to implement a handshake, as the force enable bit will still be reset but no further action will happen.
Reserved bits. Write as 0.
When set (1) the next frame received from port 0 (the local DMA port) will be forwarded to the ports defined
in the force destination port map.
The bit is reset to 0 automatically when one frame from port 0 has been processed by the switch (i.e. has
been read from the port 0 input buffer;). Therefore the bit must be set again as necessary.
29
13
0
0
HW_ENET_SWI_FORCE_FWD_P0 field descriptions
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
27
11
0
0
RSRVD1[15:4]
26
10
0
0
800F_8000h base + BCh offset =
25
0
0
9
RSRVD1[31:16]
24
0
0
8
Description
23
0
0
7
22
0
0
6
21
0
5
0
20
0
4
0
Freescale Semiconductor, Inc.
19
0
0
3
18
0
0
2
17
0
0
1
16
0
0
0