MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1090

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Core Command Queue with Placement Logic
high priority commands or ports with low allocated bandwidths, bandwidth overflow may
be useful. To mimic simple round-robin arbitration, program all ports to have the same
priority and full bandwidth allocations.
Note: The bandwidth parameter (axiY_bdw) is a seven-bit parameter. However, any
programmed value greater than 0x64 is interpreted as 100%.
14.5.9 Command Queue with Placement Logic
From the Arbiter, commands are routed to the command queue of the core logic. The
command queue is fed using a placement algorithm. For more information on this algorithm,
refer to section
14.6 Core Command Queue with Placement Logic
The core logic contains a command queue that accepts commands from the Arbiter. This
command queue uses a placement algorithm to determine the order that commands will
execute in the core logic. The placement logic follows many rules to determine where new
commands should be inserted into the queue, relative to the contents of the command queue
at the time. Placement is determined by considering address collisions, source collisions,
data collisions, command types and priorities. In addition, the placement logic attempts to
maximize efficiency of the core logic through command grouping and bank splitting. Once
placed into the command queue, the relative order of commands is constant.
Many of the rules used in placement may be individually enabled/disabled. In addition, the
queue may be disabled by clearing the placement_en parameter, resulting in an in-line queue
that services requests in the order they are received. If the placement_en parameter is cleared
to ‘b0, the placement algorithm will be ignored.
14.6.1 Rules of the Placement Algorithm
The factors affecting command placement all work together to identify where a new
command fits into the execution order. They are listed in order of importance, as follows:
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• Address collision/data coherency violation
• Source ID collision
• Write buffer collision
• Priority
• Bank splitting
• Read/write grouping
Core Command Queue with Placement
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Logic.
Freescale Semiconductor, Inc.