MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2049

no-image

MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
HW_USBPHY_DEBUG: 0x050
HW_USBPHY_DEBUG_SET: 0x054
HW_USBPHY_DEBUG_CLR: 0x058
HW_USBPHY_DEBUG_TOG: 0x05c
Address:
Freescale Semiconductor, Inc.
Reset
Reset
SQUELCHRESETLENGTH
HOST_RESUME_DEBUG
ENSQUELCHRESET
Bit
Bit
W
W
R
R
CLKGATE
31
15
0
0
RSVD3
RSVD2
28 25
23 21
Field
31
30
29
24
RSVD1
HW_USBPHY_DEBUG
30
14
1
0
29
13
1
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Reserved.
Gate Test Clocks.
Clear to 0 for running clocks.
Set to 1 to gate clocks. Set this to save power while the USB is not actively being used.
Configuration state is kept while the clock is gated.
Choose to trigger the host resume SE0 with HOST_FORCE_LS_SE0 = 0 or UTMI_SUSPEND
= 1.
Duration of RESET in terms of the number of 480-MHz cycles.
Set bit to allow squelch to reset high-speed receive.
Reserved.
SQUELCHRESETLENGTH
28
12
1
0
HW_USBPHY_DEBUG field descriptions
27
11
1
0
8007_C000h base + 50h offset = 8007_C050h
TX2RXCOUNT
26
10
1
0
25
1
0
9
24
1
0
8
23
0
0
7
RSVD0
Description
RSVD2
22
0
0
6
21
0
5
0
Chapter 32 Integrated USB 2.0 PHY
20
1
4
0
SQUELCHRESETCOUNT
19
1
0
3
18
0
0
2
17
0
0
1
2049
16
0
0
0

Related parts for MCIMX286CVM4B