MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1582

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
25.6.3 Free Running Timer (HW_CAN_TIMER)
This register represents a 16-bit free-running counter that can be read and written by the
ARM. The timer starts at 0x0000 upon reset, counts linearly to 0xFFFF, then wraps back
to 0x0000. The default value of this register is 0x00000000.
This register represents a 16-bit free-running counter that can be read and written by the
ARM. The timer starts at 0x0000 upon reset, counts linearly to 0xFFFF, then wraps back
to 0x0000. The timer is clocked by the FlexCAN bit-clock (which defines the baud rate on
the CAN bus). During a message transmission/reception, it increments each time a bit is
received or transmitted. When there is no message on the bus, it counts using the
previously-programmed baud rate. During freeze mode, the timer is not incremented. The
timer value is captured at the beginning of the identifier field of any frame on the CAN bus.
This captured value is written into the time stamp entry in a message buffer after a successful
reception or transmission of a message. Writing to the timer is an indirect operation. The
data is first written to an auxiliary register and then an internal request/acknowledge
procedure across clock domains is executed. All this is transparent to the user, except for
the fact that the data takes some time to actually be written to the register. If desired, software
can poll the register to discover when the data was actually written.
Address:
Re-
1582
set
Bit
W
R
PROP_SEG
31
0
TIMER
31 16
RSVD
Field
Field
15 0
2 0
30
0
29
0
HW_CAN_TIMER
28
0
This 3-bit field defines the length of the propagation segment in the bit time.
Reserved .
each time a message is received in Message Buffer
27
0
26
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
HW_CAN_CTRL field descriptions (continued)
RSVD
24
0
23
0
8003_2000h base + 8h offset = 8003_2008h
HW_CAN_TIMER field descriptions
22
0
21
0
20
0
19
0
18
0
17
0
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
TIMER
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0