MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1271

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor, Inc.
HW_GPMI_ECCCOUNT<=
HW_GPMI_COMPARE <=
HW_GPMI_COMPARE <=
HW_GPMI_COMPARE <=
HW_GPMI_COMPARE <=
HW_GPMI_COMPARE <=
HW_GPMI_ECCCTRL <=
HW_GPMI_ECCCTRL <=
HW_GPMI_ECCCTRL <=
HW_GPMI_ECCCTRL <=
HW_GPMI_CTRL0 <=
HW_GPMI_CTRL0 <=
HW_GPMI_CTRL0 <=
HW_GPMI_CTRL0 <= read_and_compare 8_bit disabled 2 NAND_DATA
HW_GPMI_CTRL0 <=
HW_GPMI_CTRL0 <=
CMD
CMD
CMD
CMD
CMD
CMD
CMD
CMD
CMD
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Descriptor 6: Disable BCH engine (if enabled by another thread) and issue NAND status command (CLE).
Descriptor 1: Disable BCH engine and issue NAND write set-up command and address (CLE/ALE).
Figure 16-8. BCH Encode DMA Descriptor Chain
Descriptor 3: Disable BCH engine and issue NAND write execute command (CLE).
<=
<=
<=
Descriptor 7: Read the NAND status and compare against expected value.
<=
<=
<=
<=
<=
<=
Descriptor 2: Enable the BCH engine and write the data payload.
Descriptor 8: PSENSE compare for status comparison check.
wait_for_ready
Descriptor 5: PSENSE compare for time-out.
1 + 5
write
write
write
write
Descriptor 9: Emit GPMI DMA interrupt.
1
0
0
1
0
0
0
0
Descriptor 4: Wait for NAND ready.
encode_8_bit
<mask_value>
HW_GPMI_AUXILIARY
HW_GPMI_PAYLOAD
----
----
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
NEXT CMD ADDR
null
null
null
null
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
BUFFER ADDR
8_bit enabled 2 NAND_CLE
8_bit enabled 2
8_bit
8_bit enabled 2 NAND_DATA
8_bit disabled 2 NAND_DATA
3
1
0
3
2
0
0
3
4
enabled 2
4096+218 (flash page size)
1
1
0
1
1
0
0
1
1
0
0
0
0
0
0
0
0
0
NAND_CLE
NAND_CLE 1
disable
disable
disable
enable
0
1
0
0
0
0
0
0
0
Chapter 16 20-BIT Correcting ECC Accelerator (BCH)
<reference_value>
1 0 1
0
0 0 1 NO_DMA_XFER
0
0 0 1
1 0 1
0
1 0 1 NO_DMA_XFER
0
0 0 1
0 1 0 NO_DMA_XFER
0
1 0 1
1 0 1 NO_DMA_XFER
null
null
null
null
DMA_SENSE
DMA_READ
DMA_SENSE
DMA_READ
DMA_READ
1 + 5
0x1FF
1
0
1
1
----
----
0
1 Byte NAND CMD
1 Byte NAND CMD
1 Byte NAND CMD
Auxiliary Payload
Descriptor Chain
8*512 Byte Data
data transferred to
GPMI when using
Payload Buffer
5 Byte ADDR
NOTE: No DMA
DMA Error
Buffer
BCH
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