MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2182

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Programmable Registers
34.4.36 PXP Overlay 2 Parameters 2 (HW_PXP_OL2PARAM2)
This register contains buffer parameters for the Overlay 2 input buffer.
The Overlay 2 Parameter 2 register is reserved for future use.
Address:
Re-
34.4.37 PXP Overlay 3 Buffer Pointer (HW_PXP_OL3)
Overlay 3 Buffer Address Pointer. This register points to the beginning of the RGB Overlay
3 input buffer.
This register points to the is used by the logic to point to the current output location for the
RGB frame buffer.
EXAMPLE
u32* overlay_ptr;
HW_PXP_OLn_WR(3,overlay_ptr);
2182
set
Bit
W
R
31
ENABLE
0
RSVD
Field
Field
31 0
30
0
0
29
0
HW_PXP_OL2PARAM2
28
0
0x0
0x1
0x2
0x3
Indicates that the overlay is active for this operation.
Reserved, always set to zero.
27
0
26
0
HW_PXP_OL2PARAM field descriptions (continued)
Embedded — Indicates that the OL pixel alpha value will be used to blend the OL with S0.The ALPHA
field is ignored.
Override — Indicates that the value in the ALPHA field should be used instead of the alpha values
present in the input pixels.
Multiply — Indicates that the value in the ALPHA field should be used to scale all pixel alpha values.
Each pixel alpha is multiplied by the value in the ALPHA field.
ROPs — Enable ROPs. The ROP field indicates an operation to be performed on the overlay and S0
pixels.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
0
24
0
HW_PXP_OL2PARAM2 field descriptions
23
0
22
0
8002_A000h base + 2B0h offset = 8002_A2B0h
21
0
20
0
19
0
18
0
17
0
RSVD
16
0
15
0
Description
Description
14
0
13
0
12
0
11
0
10
0
0
9
0
8
Freescale Semiconductor, Inc.
0
7
0
6
0
5
0
4
3
0
0
2
0
1
0
0

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