MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1614
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MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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IP and Higher Layers Frame Format
The defined sequence used to decode a Magic Packet is formed with a synchronization
stream (Six consecutive 0xFF bytes) followed by a sequence of six consecutive Unicast
MAC addresses (The Unicast Address of the Node to be awakened).
The sequence can be located anywhere in the Magic Packet payload and the Magic Packet
is formed with standard Ethernet header optional padding and CRC.
26.3.5 IP and Higher Layers Frame Format
26.3.5.1 Definitions
The following chapters use the term datagram to describe the protocol specific data unit,
which is found within the payload section of its container entity.
For example, an IP datagram specifies the payload section of an Ethernet frame. A TCP
datagram specifies the payload section within an IP datagram.
26.3.5.2 Ethernet Types
IP datagrams are carried in the payload section of an Ethernet frame. The Ethernet frame
type/length field is used to discriminate several datagram types. The following table lists
the types of interest:
26.3.5.3 IPv4 Datagram Format
The following Figure 6 shows the IP Version 4 (IPv4) header, which is located at the
beginning of an IP datagram. It is organized in 32-bit words. The most significant bit is bit
31 in the following figure. The first byte sent/received is the leftmost byte of the first word
(that is, Version/IHL field).
The IP Header can contain further options, which are always padded if necessary, to
guarantee the payload following the header is aligned to a 32-bit boundary.
1614
0x8100
0x0800
0x0806
0x86dd
Type
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Table 26-7. Ethernet Type Value Examples
VLAN tagged frame. The actual type is found 4 octets later in the frame
Description
ARP
IPv6
IP
Freescale Semiconductor, Inc.
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