MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1484

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
The watchdog timer decrements the register value once for every tick of the 1-KHz clock
supplied from the RTC analog section (see
timer has no effect on the values retained in the master registers of the real-time clock
seconds counter, alarm, or persistent registers (analog persistent storage).
The watchdog timer is initially disabled and set to count 4,294,967,295 milliseconds before
generating a watchdog reset.
The watchdog timer does not run when the chip is in its powered-down state. Therefore,
there is no master/shadow register pairing for the watchdog timer, and it must be
reprogrammed after cycling power or resetting the block.
The watchdog timer must be "present" on an actual chip to perform this function (see the
HW_RTC_STAT_WATCHDOG_PRESENT bit description).
22.8 Programmable Registers
RTC Hardware Register Format Summary
1484
8005_60C0
8005_60D0
8005_6000
8005_6010
8005_6020
8005_6030
8005_6040
8005_6050
8005_6060
8005_6070
8005_6080
8005_6090
8005_60A0
8005_60B0
Absolute
address
(hex)
Real-Time Clock Control Register (HW_RTC_CTRL)
Real-Time Clock Status Register (HW_RTC_STAT)
Real-Time Clock Milliseconds Counter
(HW_RTC_MILLISECONDS)
Real-Time Clock Seconds Counter (HW_RTC_SECONDS)
Real-Time Clock Alarm Register (HW_RTC_ALARM)
Watchdog Timer Register (HW_RTC_WATCHDOG)
Persistent State Register 0 (HW_RTC_PERSISTENT0)
Persistent State Register 1 (HW_RTC_PERSISTENT1)
Persistent State Register 2 (HW_RTC_PERSISTENT2)
Persistent State Register 3 (HW_RTC_PERSISTENT3)
Persistent State Register 4 (HW_RTC_PERSISTENT4)
Persistent State Register 5 (HW_RTC_PERSISTENT5)
Real-Time Clock Debug Register (HW_RTC_DEBUG)
Real-Time Clock Version Register (HW_RTC_VERSION)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Register name
HW_RTC memory map
Figure
22-1). The reset generated by the watchdog
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Freescale Semiconductor, Inc.
FFFF_FFFFh
C000_0020h
E0FF_0000h
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0100h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0203_0000h
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