MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 103

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1 Product Overview
1.3.11 Ethernet Interfaces
The i.MX28 includes extensive Ethernet connectivity support. Ethernet controller includes
two programmable 10/100 IEEE 802.3 Ethernet MACs. There is one time stamping module
for each MAC to support Ethernet applications requiring precise timing references for
incoming and outgoing frames to implement a distributed time synchronization protocol
such as the IEEE 1588.
In addition to this, a hardware 3-port switch is supported for either redundancy (dual cables)
or daisy-chaining (packet forwarding) to support automatic extension of control networks.
Two unified DMA blocks allows backward compatibility to legacy FEC interface (note that
all uDMA programming is performed through the MAC0 and MAC1 register interfaces).
1.3.12 CAN Interfaces
The i.MX28 includes dual FlexCAN2 controllers which are compatible with the CAN 2.0B
protocol specification [Ref. 1]. The CAN Protocol Interface (CPI) manages the serial
communication on the CAN bus, requesting RAM access for receiving and transmitting
message frames, validating received messages and performing error handling. The Message
Buffer Management (MBM) handles Message Buffer selection for reception and transmission,
taking care of arbitration and ID matching algorithms.
1.3.13 USB Interfaces
The i.MX28 includes two high-speed Universal Serial Bus (USB) version 2.0 controllers
and integrated USB Transceiver Macrocell Interface (UTMI) PHYs. The i.MX28 device
interface can be attached to USB 2.0 hosts and hubs running in the USB 2.0 high-speed
mode at 480 Mbits per second. It can be attached to USB 2.0 full-speed interfaces at 12
Mbits per second. Note that a dual-device configuration is not supported.
The USB controllers and integrated PHYs support high-speed Host modes for peer-to-peer
file interchange. The USB controller can also be configured as a high-speed host.
The USB subsystem is designed to make efficient use of system resources within the i.MX28.
It contains a random-access DMA engine that reduces the interrupt load on the system and
reduces the total bus bandwidth that must be dedicated to service the five on-chip physical
endpoints.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Freescale Semiconductor, Inc.
103