MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 356

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
356
8000_45C0
8000_45D0
8000_44F0
8000_4500
8000_4510
8000_4520
8000_4530
8000_4540
8000_4550
8000_4560
8000_4570
8000_4580
8000_4590
8000_45A0
8000_45B0
8000_45E0
8000_45F0
8000_4600
8000_4610
8000_4620
8000_4630
Absolute
address
(hex)
APBH DMA Channel 9 Current Command Address Register
(HW_APBH_CH9_CURCMDAR)
APBH DMA Channel 9 Next Command Address Register
(HW_APBH_CH9_NXTCMDAR)
APBH DMA Channel 9 Command Register
(HW_APBH_CH9_CMD)
APBH DMA Channel 9 Buffer Address Register
(HW_APBH_CH9_BAR)
APBH DMA Channel 9 Semaphore Register
(HW_APBH_CH9_SEMA)
AHB to APBH DMA Channel 9 Debug Information
(HW_APBH_CH9_DEBUG1)
AHB to APBH DMA Channel 9 Debug Information
(HW_APBH_CH9_DEBUG2)
APBH DMA channel 10 Current Command Address Register
(HW_APBH_CH10_CURCMDAR)
APBH DMA channel 10 Next Command Address Register
(HW_APBH_CH10_NXTCMDAR)
APBH DMA channel 10 Command Register
(HW_APBH_CH10_CMD)
APBH DMA channel 10 Buffer Address Register
(HW_APBH_CH10_BAR)
APBH DMA channel 10 Semaphore Register
(HW_APBH_CH10_SEMA)
AHB to APBH DMA channel 10 Debug Information
(HW_APBH_CH10_DEBUG1)
AHB to APBH DMA channel 10 Debug Information
(HW_APBH_CH10_DEBUG2)
APBH DMA Channel 11 Current Command Address Register
(HW_APBH_CH11_CURCMDAR)
APBH DMA Channel 11 Next Command Address Register
(HW_APBH_CH11_NXTCMDAR)
APBH DMA Channel 11 Command Register
(HW_APBH_CH11_CMD)
APBH DMA Channel 11 Buffer Address Register
(HW_APBH_CH11_BAR)
APBH DMA Channel 11 Semaphore Register
(HW_APBH_CH11_SEMA)
AHB to APBH DMA Channel 11 Debug Information
(HW_APBH_CH11_DEBUG1)
AHB to APBH DMA Channel 11 Debug Information
(HW_APBH_CH11_DEBUG2)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_APBH memory map (continued)
Register name
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Freescale Semiconductor, Inc.
00A0_0000h
00A0_0000h
00A0_0000h
Reset value
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
0000_0000h
6.5.71/443
6.5.72/443
6.5.73/444
6.5.74/446
6.5.75/447
6.5.76/447
6.5.77/450
6.5.78/450
6.5.79/451
6.5.80/451
6.5.81/454
6.5.82/454
6.5.83/455
6.5.84/457
6.5.85/458
6.5.86/458
6.5.87/459
6.5.88/461
6.5.89/462
6.5.90/463
6.5.91/465
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