MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1105

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Using the “auto configure mode” help to eliminate the change of delay value because the
reference delay itself also changes along with environmental conditions.
14.7.10 Configure output enable of I/O Control
Some EMI I/Os require a control signal named "output enable". The I/O can drive signals
out only when the "output enable" signal is active. Refer to the figure below.
There are three kinds of output enable signals in this EMI design:
Freescale Semiconductor, Inc.
• Bypass mode, or manual configure mode
• io_dq_out_oen
• io_dqm_oen
• io_dqs_oen
calculated by multiplying the encoder [7:0] integer by the parameter settings for each
delay line and then dividing by 128 and rounding. These values are then encoded into
a one-hot counter and updated at initialization and at every refresh interval.
The phase-detector can be bypassed. The number of delay elements for read and write
delay-line is programmed manually.
output enable for write data.
output enable for write data mask. Please configure it exactly the same as io_dq_out_oen.
In case the number of delay elements is fixed, the actual delay
value (in nano-second) of a delay-line would change according
to the environmental conditions, such as voltage, temperature,
and so on.
io_dq_out
io_dq_out_oen
io_dqs_out
io_dqs_out_oen
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Figure 14-14. EMI I/O Output Enable
NOTE
d0
d1
d2
Chapter 14 External Memory Interface (EMI)
d3
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