MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 467

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
6.5.94 APBH DMA channel 12 Command Register
The APBH DMA channel 12 command register specifies the cycle to perform for the current
command chain item.
The command register controls the overall operation of each DMA command for this channel.
It includes the number of bytes to transfer to or from the device, the number of APB PIO
command words included with this command structure, whether to interrupt at command
completion, whether to chain an additional command to the end of this one and whether
this transfer is a read or write DMA transfer.
Address:
Freescale Semiconductor, Inc.
Reset
CMD_ADDR
Bit
W
R
Field
31 0
31
0
(HW_APBH_CH12_CMD)
HW_APBH_CH12_CMD
30
0
Pointer to next command structure for channel 12.
29
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_APBH_CH12_NXTCMDAR field descriptions
28
0
27
0
8000_4000h base + 660h offset = 8000_4660h
26
0
25
0
XFER_COUNT
Chapter 6 AHB-to-APBH Bridge with DMA (APBH-Bridge-DMA)
24
0
Description
23
0
22
0
21
0
20
0
19
0
18
0
17
0
16
0
467

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