MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 856

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Programmable Registers
10.8.1 System PLL0, System/USB0 PLL Control Register 0
HW_CLKCTRL_PLL0CTRL0: 0x000
HW_CLKCTRL_PLL0CTRL0_SET: 0x004
HW_CLKCTRL_PLL0CTRL0_CLR: 0x008
HW_CLKCTRL_PLL0CTRL0_TOG: 0x00C
The PLL0 Control Register 0 programs the 480 MHz PLL0 and the USB0-clock enables.
EXAMPLE
HW_CLKCTRL_PLL0CTRL0_WR(BF_CLKCTRL_PLL0CTRL0_POWER(1));
PLL0 lock before using it
856
8004_01C0
8004_01D0
8004_00E0
8004_00F0
8004_0100
8004_0110
8004_0120
8004_0130
8004_0140
8004_0150
8004_0160
8004_01B0
8004_01E0
8004_01F0
8004_0200
Absolute
address
(hex)
(HW_CLKCTRL_PLL0CTRL0)
SPDIF Clock Control Register (HW_CLKCTRL_SPDIF)
EMI Clock Control Register (HW_CLKCTRL_EMI)
SAIF0 Clock Control Register (HW_CLKCTRL_SAIF0)
SAIF1 Clock Control Register (HW_CLKCTRL_SAIF1)
CLK_DIS_LCDIF Clock Control Register
(HW_CLKCTRL_DIS_LCDIF)
ETM Clock Control Register (HW_CLKCTRL_ETM)
ENET Clock Control Register (HW_CLKCTRL_ENET)
HSADC Clock Control Register (HW_CLKCTRL_HSADC)
FLEXCAN Clock Control Register (HW_CLKCTRL_FLEXCAN)
Fractional Clock Control Register 0 (HW_CLKCTRL_FRAC0)
Fractional Clock Control Register 1 (HW_CLKCTRL_FRAC1)
Clock Frequency Sequence Control Register
(HW_CLKCTRL_CLKSEQ)
System Reset Control Register (HW_CLKCTRL_RESET)
ClkCtrl Status (HW_CLKCTRL_STATUS)
ClkCtrl Version (HW_CLKCTRL_VERSION)
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
HW_CLKCTRL memory map (continued)
Register name
// enable PLL and wait 10 us to let
(in bits)
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Freescale Semiconductor, Inc.
E010_0000h
0044_83FFh
0C02_0000h
Reset value
8000_0000h
8000_0101h
8000_0001h
8000_0001h
8000_0001h
8000_0001h
0000_0000h
7800_0000h
9292_9292h
0092_9292h
0000_0012h
0000_0000h
10.8.15/875
10.8.16/876
10.8.17/877
10.8.18/878
10.8.19/880
10.8.20/881
10.8.21/882
10.8.22/883
10.8.23/884
10.8.24/885
10.8.25/887
10.8.26/889
10.8.27/891
10.8.28/892
10.8.29/893
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