MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 2120

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Operation
34.2 Operation
The PXP operates by rendering the output frame buffer in 8x8 or 16x16 pixel macroblocks
in display order (left to right, then top to bottom). At each output macroblock location, the
PXP determines whether the S0 buffer is visible based on the cropping register and S0 offset
parameters. If the S0 plane is visible, the PXP will fetch and process the required data from
the S0 image, otherwise, the S0's contribution to the output macroblock will be the
S0BACKGROUND register value. This value is effectively the color of the letterboxed
region or background color.
The PXP will also determine if an overlay is present for that macroblock location, and if
so, instruct the S1 buffer to fetch the required data. If multiple overlays cover the macroblock,
the PXP will select only the lowest numbered overlay and direct the S1 buffer to load the
data for this overlay. For areas with no overlays, the S1 buffer contributes nothing to the
rendered image. The following figure shows the order in which the output blocks are
generated (blocks 0, 1, 2) and indicates how various blocks are rendered (blocks A-E).
Figure 34-3. Pixel Pipeline (PXP) Macro Blocks
It is important to understand how the PXP renders each output macroblock to properly
understand how it accomplishes cropping, letterboxing, and overlay blending. The following
sections will provide more details on these operations.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
2120
Freescale Semiconductor, Inc.

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