MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 611

• Manufacturer Part Number: MCIMX286CVM4B
• Description: IC MPU I.MX286 289MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: i.MX28r

Specifications of MCIMX286CVM4B

• Core Processor: ARM9
• Core Size: 32-Bit
• Speed: 454MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Program Memory Size: 128KB (32K x 32)
• Program Memory Type: Mask ROM
• Ram Size: 32K x 32
• Voltage - Supply (vcc/vdd): 1.25 V ~ 5.25 V
• Data Converters: A/D 17x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 289-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Address:
Freescale Semiconductor, Inc.
Reset
Reset
TERMINATEFLUSH
Bit
Bit
W
W
XFER_COUNT
R
R
CMDWORDS
RSVD1
31 16
15 12
11 10
31
15
Field
0
0
9
HW_APBX_CH12_CMD
CMDWORDS
30
14
0
0
29
13
0
0
This field indicates the number of bytes to transfer to or from the appropriate PIO register in the UART2
device HW_UARTAPP_DATA register. A value of 0 indicates a 64 KBytes transfer.
This field indicates the number of command words to send to the UART2, starting with the base PIO
address of the UART2 (HW_UARTAPP_CTRL0) and increment from there. Zero means transfer NO
command words
Reserved, always set to zero.
A value of one indicates that the channel will flush out any remainder data in DMA FIFO when
termination occurs. Only appliese for write DMA operation.
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
28
12
0
0
HW_APBX_CH12_CMD field descriptions
27
11
0
0
RSVD1
8002_4000h base + 660h offset = 8002_4660h
26
10
0
0
25
0
0
9
XFER_COUNT
Chapter 7 AHB-to-APBX Bridge with DMA (APBX-Bridge-DMA)
24
0
0
8
23
Description
0
0
7
22
0
0
6
21
0
5
0
RSVD0
20
0
4
0
19
0
0
3
18
0
0
2
COMMAND
17
0
0
1
16
0
0
0
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