MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 62

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MCIMX286CVM4B

Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r

Specifications of MCIMX286CVM4B

Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
Section Number
62
27.1
27.2
27.3
27.4
I2C Overview..............................................................................................................................................................1729
Operation....................................................................................................................................................................1730
Internal Interface Modes.............................................................................................................................................1749
Behavior During Reset................................................................................................................................................1751
26.4.105
26.4.106
26.4.107
26.4.108
26.4.109
26.4.110
26.4.111
26.4.112
27.2.1
27.2.2
27.2.3
27.3.1
27.3.2
27.4.1
ENET MAC Compare register 2 (HW_ENETMAC_COMP_REG_2)...................................................1723
ENET MAC Compare register 3 (HW_ENETMAC_COMP_REG_3)...................................................1724
ENET MAC Capture register 0 (HW_ENETMAC_CAPT_REG_0)......................................................1724
ENET MAC Capture register 1 (HW_ENETMAC_CAPT_REG_1)......................................................1725
ENET MAC Capture register 2 (HW_ENETMAC_CAPT_REG_2)......................................................1725
ENET MAC Capture register 3 (HW_ENETMAC_CAPT_REG_3)......................................................1726
ENET MAC IEEE1588 Interrupt register. (HW_ENETMAC_CCB_INT)............................................1726
ENET MAC IEEE1588 Interrupt enable mask register (HW_ENETMAC_CCB_INT_MASK)...........1727
I2C Interrupt Sources..............................................................................................................................1731
I2C Bus Protocol.....................................................................................................................................1732
Programming Examples..........................................................................................................................1744
PIO Mode................................................................................................................................................1749
PIO Queue Mode.....................................................................................................................................1750
Pinmux Selection During Reset...............................................................................................................1751
27.2.2.1
27.2.2.2
27.2.2.3
27.2.2.4
27.2.2.5
27.2.2.6
27.2.3.1
27.2.3.2
27.4.1.1
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
Simple Device Transactions..................................................................................................1734
Typical EEPROM Transactions.............................................................................................1735
Master Mode Protocol...........................................................................................................1736
Clock Generation..................................................................................................................1736
Master Mode Operation........................................................................................................1737
Slave Mode Protocol.............................................................................................................1741
Five Byte Master Write Using DMA....................................................................................1745
Reading 256 bytes from an EEPROM..................................................................................1747
Correct and Incorrect Reset Examples..................................................................................1752
Inter IC (I2C)
Chapter 27
Title
Freescale Semiconductor, Inc.
Page

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