MCIMX286CVM4B Freescale Semiconductor, MCIMX286CVM4B Datasheet - Page 1180
MCIMX286CVM4B
Manufacturer Part Number
MCIMX286CVM4B
Description
IC MPU I.MX286 289MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX28r
Datasheets
1.MCIMX283DVM4B.pdf
(70 pages)
2.MCIMX283DVM4B.pdf
(2 pages)
3.MCIMX283DVM4B.pdf
(2327 pages)
4.MCIMX283DVM4B.pdf
(20 pages)
Specifications of MCIMX286CVM4B
Core Processor
ARM9
Core Size
32-Bit
Speed
454MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Program Memory Size
128KB (32K x 32)
Program Memory Type
Mask ROM
Ram Size
32K x 32
Voltage - Supply (vcc/vdd)
1.25 V ~ 5.25 V
Data Converters
A/D 17x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
289-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant
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Programmable Registers
14.8.81 DRAM Control Register 86 (HW_DRAM_CTL86)
This is a DRAM configuration register.
Address:
Re-
14.8.82 DRAM Control Register 87 (HW_DRAM_CTL87)
This is a DRAM configuration register.
Address:
Re-
1180
set
set
Bit
Bit
W
W
R
R
DLL_CTRL_
OBSOLETE
VERSION
REG_0_0
31
31
0
0
31 16
Field
15 0
Field
31 0
30
30
0
0
29
29
0
0
HW_DRAM_CTL86
HW_DRAM_CTL87
28
28
0
0
Always write zeroes to this field.
Controller version number. READ-ONLY
Holds the EMI version number for this controller. This parameter is read-only.
Controls the DLL bypass logic and holds the DLL start point and read DQS delay settings for data slice 0.
There is a separate dll_ctrl_reg_0_X parameters for each of the slices of data sent on the DFI data bus.
Bit [28] = DLL Bypass Control.
'b0 = Normal operational mode. In this mode, the DLL uses dll_ctrl_reg_0_X [14:8] for the read DQS and
dll_ctrl_reg_1_X [14:8] for clk_wr.
'b1 = Bypass Mode is on. In this mode, the DLL uses dll_ctrl_reg_0_X [23:15] for the read DQS and
dll_ctrl_reg_1_X [23:15] for clk_wr.
Bits [23:15] = Holds the read DQS delay setting when the DLL is operating in bypass mode. (dll_ctrl_reg_0_X
[28] = 'b1)
27
27
0
0
26
26
0
0
i.MX28 Applications Processor Reference Manual, Rev. 1, 2010
25
25
0
0
OBSOLETE
24
24
0
0
23
23
0
0
HW_DRAM_CTL86 field descriptions
HW_DRAM_CTL87 field descriptions
800E_0000h base + 158h offset = 800E_0158h
800E_0000h base + 15Ch offset = 800E_015Ch
22
22
0
0
21
21
0
0
20
20
0
0
19
19
0
0
DLL_CTRL_REG_0_0
18
18
0
0
17
17
0
0
16
16
0
0
15
15
0
0
Description
Description
14
14
0
0
13
13
1
0
12
12
0
0
11
11
0
0
10
10
0
0
0
0
9
9
VERSION
0
0
8
8
Freescale Semiconductor, Inc.
0
0
7
7
1
0
6
6
0
0
5
5
0
0
4
4
3
0
3
0
0
0
2
2
0
0
1
1
0
0
0
0
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